The present invention relates to a CMOS semiconductor integrated circuit device and, more particularly, to a CMOS semiconductor integrated circuit device in which any such malfunctions as may be caused by the charging and discharging of the CMOS buffer circuit is prevented from occurring in other CMOS circuits within the integrated circuit device.
As a conventional CMOS semiconductor integrated circuit device, there has been known a circuit in which, for example, an n-type MOS element is formed on a p-type semiconductor substrate and a p-type MOS element is formed on an n-type well region and in which the p-type region which is for providing a substrate potential to the p-type semiconductor substrate is connected, together with the source region of the n-type MOS, to the ground by a ground wiring and an n-type region which is for providing a well potential to the n-well region is connected, together with the source region of the p-type MOS circuit, to a power supply through a power supply wiring. The power supply wiring or the ground wiring to which an output buffer is connected allows the flow of a large current and this causes "power supply noise" due to fluctuations of the potential of the power supply wiring or the ground wiring during the operating state of the buffer. Such power supply noise can propagate to other circuits formed in the same substrate since the p-type region connected to the ground wiring is connected to the p-type regions formed at other parts through the substrate resistance. Normally, in order to stabilize the substrate potential or the well potential, the substrate or the well is connected to the ground wiring or the power supply wiring at a plurality of points.